BiCMOS high-performance ICs : from DC to mm-wave

Progress with silicon and silicon germanium (SiGe) based BiCMOS technologies over the past few years has been very impressive. This enables the implementation of traditional microwave and emerging mm-wave applications in silicon. The paper gives an overview of several high-performance ICs that have been implemented in a state-of-the-art BiCMOS technology (QUBiC4). Examples of high-performance ICs are described ranging from basic building blocks for mobile applications to highly integrated receiver and transmitter ICs for applications up to the mm-wave range

BiCMOS high-performance ICs: From DC to mm-wave

Progress with silicon and silicon germanium (SiGe) based BiCMOS technologies over the past few years has been very impressive. This enables the implementation of traditional microwave and emerging mm-wave applications in silicon. The paper gives an overview of several high-performance ICs that have been implemented in a state-of-the-art BiCMOS technology (QUBiC4). Examples of high-performance ICs are described ranging from basic building blocks for mobile applications to highly integrated receiver and transmitter ICs for applications up to the mm-wave range

EM Analysis of Inhomogeneous Layers Stack from the Wave Concept. Reduction of Substrate Couplings in BiCMOS Technology.

This paper presents a new original full wave hybrid approach based on a wave concept formulation to analyze inhomogeneous layers stack with arbitrary doping profiles. To demonstrate capabilities of this approach simulation results are presented and successfully compared to published results and available software in the case of homogeneous multilayer BiCMOS typical structure with and without buried diffusions layers (BDL) for multi-levelmetallizations. To reduce epitaxial/substrate coupling noise, metallically grilled BDL with varying doping profiles are investigated and exhibit an isolation improvement of about 20 dB

Ku-band integrated building blocks for phased-array transmitter design in SiGe:C BiCMOS

In this paper, the design methodology and layout considerations of a multiphase Rotary Travelling-Wave Voltage-Controlled Oscillator (RTW-VCO) and a high gain three-stage Power Amplifier (PA) for a phased-array transmitter application are presented. Using a 0.25 μm BiCMOS process, the fabricated VCO gives access to 8 different phases in steps of 45 degrees and it achieves a tuning range of 1 GHz for measured output power of -6.5 dBm at 17 GHz. The three-stage PA shows 25 dB of gain for 16-20 GHz of bandwidth, and it achieves saturated output power of 7.5 dBm

GaAs low cost microwave monolithic circuits for high volume television applications.

Two MMICs have been designed and fabricated for television applications. To be compatible with the needs of the market, low cost approaches have been used to design these circuits. The first one, is an image rejection downconverter fabricated on a 2.4mm2 chip using a 0.5 micron MESFET low cost process. This circuit converts signals in the 10.95 to 12.75GHz band to a lower frequency band (1). The second one is a fully integrated 2GHz downconverter IC fabricated on a 0.9mm2 chip, using an enhancement mode GaAs process. It converts signals in the 0.95GHz to 2GHz band to the UHF band with its internal local oscillator (2). In both cases, original solutions have been used to reduce the cost of the packaged chips

Combining Internal Probing with Artificial Neural Networks for Optimal RFIC Testing

International audienceIn order to reduce production costs of RF devices, it is important to remove bad circuits very early in the production flow. It is all the more true for dies designed to be integrated in complex systems. Thus highly efficient RF wafer testing is mandatory for those applications to prevent the loss of assembled systems due to defective RF dies. The problem is that current RF probing technologies hardly fulfil the industrial test requirements in terms of accuracy, reliability and cost. The proposed method proves to be a very interesting alternative to validate RF parameters with no need of expensive RF equipments (RF probes and RF automated test equipments (ATE)). A new test strategy based on DC or very low frequency (LF) measurements, which allows the elimination of expensive RF tests, is presented. The main idea is to insert some simple design for test (DfT) circuitry within the chip. This DfT provides relevant information on the structural behavior of the device blocks. The internal node data are additional to standard DC test measurements like power supply current or advanced DC test signatures (e.g. Vdd ramping), and LF measurements like gain in loopback mode. Since RF performance of each block is directly related to such structural data, it is possible to predict the RF characteristics of the blocks without time consuming RF measurements. RF parameters estimation is performed using nonlinear artificial neural network

Frequency Domain Phase Shift Measurement Technique Applied to a Multiphase Rotary Travelling-Wave VCO

In this letter, the design of a multiphase 18.5 GHz Rotary Travelling-Wave Oscillator (RTWO) is presented. Lack of symmetry in such a structure can result in oscillation in a standing wave rather than the travelling wave mode. In order to determine the mode of the signal, before going through the time consuming steps of time domain phase shift measurement, we have proposed a preliminary phase shift measurement technique in the frequency domain for a high frequency RTWO. This new technique was verified against direct phase measurements for a multiphase RTWO fabricated in a 0.25 μ m BiCMOS process with good agreement. In other measurements, the VCO achieved a tuning range of 1.1 GHz and output power of-5.3 dBm